lunes, 17 de febrero de 2014

[B210.Ebook] Download Ebook VLSI Physical Design: From Graph Partitioning to Timing Closure, by Andrew B. Kahng, Jens Lienig, Igor L. Markov, Jin Hu

Download Ebook VLSI Physical Design: From Graph Partitioning to Timing Closure, by Andrew B. Kahng, Jens Lienig, Igor L. Markov, Jin Hu

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VLSI Physical Design: From Graph Partitioning to Timing Closure, by Andrew B. Kahng, Jens Lienig, Igor L. Markov, Jin Hu

VLSI Physical Design: From Graph Partitioning to Timing Closure, by Andrew B. Kahng, Jens Lienig, Igor L. Markov, Jin Hu



VLSI Physical Design: From Graph Partitioning to Timing Closure, by Andrew B. Kahng, Jens Lienig, Igor L. Markov, Jin Hu

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VLSI Physical Design: From Graph Partitioning to Timing Closure, by Andrew B. Kahng, Jens Lienig, Igor L. Markov, Jin Hu

Design and optimization of integrated circuits are essential to the creation of new semiconductor chips, and physical optimizations are becoming more prominent as a result of semiconductor scaling. Modern chip design has become so complex that it is largely performed by specialized software, which is frequently updated to address advances in semiconductor technologies and increased problem complexities. A user of such software needs a high-level understanding of the underlying mathematical models and algorithms. On the other hand, a developer of such software must have a keen understanding of computer science aspects, including algorithmic performance bottlenecks and how various algorithms operate and interact. VLSI Physical Design: From Graph Partitioning to Timing Closure introduces and compares algorithms that are used during the physical design phase of integrated-circuit design, wherein a geometric chip layout is produced starting from an abstract circuit design. The emphasis is on essential and fundamental techniques, ranging from hypergraph partitioning and circuit placement to timing closure.

  • Sales Rank: #1181357 in Books
  • Published on: 2011-02-09
  • Original language: English
  • Number of items: 1
  • Dimensions: 6.14" h x .75" w x 9.21" l, 1.39 pounds
  • Binding: Hardcover
  • 310 pages

Review

This book covers the basic algorithms underlying all physical design steps and also shows how they are applied to current instances of the design problems. It will serve the EDA and design community well. It will be a foundational text and reference for the next generation of professionals who will be called on to continue the advancement of our chip design tools.
Dr. Leon Stok, Vice President, Electronic Design Automation, IBM Corp

A clear sign of when a field matures is the availability of a widely accepted textbook. Finally, there is a well-balanced textbook that introduces the key components of a layout synthesis flow with sufficient depth and an eye for the context in which they are used.
It lucidly presents what any maker of chip design tools should have as a core foundation.
Prof. Ralph H.J.M. Otten, Technical University of Eindhoven

This is the book I wish I had when I taught EDA in the past, and the one I'm using from now on.
Dr. Louis K. Scheffer, Howard Hughes Medical Institute

I would happily use this book when teaching Physical Design.
I know of no other work that's as comprehensive and up-to-date, with algorithmic focus and clear pseudocode for the key algorithms.
The book is beautifully designed!
Prof. John P. Hayes, University of Michigan

The entire field of electronic design automation owes the authors a great debt for providing a single coherent source on physical design that is clear and tutorial in nature, while providing details on key state-of-the-art topics such as timing closure.
Prof. Kurt Keutzer, University of California, Berkeley

An excellent balance of the basics and more advanced concepts, presented by top experts in the field.
Prof. Sachin Sapatnekar, University of Minnesota

Review

“This book covers the basic algorithms underlying all physical design steps and also shows how they are applied to current instances of the design problems. It will serve the EDA and design community well. It will be a foundational text and reference for the next generation of professionals who will be called on to continue the advancement of our chip design tools.” (Dr. Leon Stok, Vice President, Electronic Design Automation, IBM Corp)

“A clear sign of when a field matures is the availability of a widely accepted textbook. Finally, there is a well-balanced textbook that introduces the key components of a layout synthesis flow with sufficient depth and an eye for the context in which they are used. It lucidly presents what any maker of chip design tools should have as a core foundation.” (Prof. Ralph H.J.M. Otten, Technical University of Eindhoven)

“This is the book I wish I had when I taught EDA in the past, and the one I'm using from now on.” (Dr. Louis K. Scheffer, Howard Hughes Medical Institute)

“I would happily use this book when teaching Physical Design. I know of no other work that's as comprehensive and up-to-date, with algorithmic focus and clear pseudocode for the key algorithms. The book is beautifully designed!” (Prof. John P. Hayes, University of Michigan)

“The entire field of electronic design automation owes the authors a great debt for providing a single coherent source on physical design that is clear and tutorial in nature, while providing details on key state-of-the-art topics such as timing closure.” (Prof. Kurt Keutzer, University of California, Berkeley)

“An excellent balance of the basics and more advanced concepts, presented by top experts in the field.” (Prof. Sachin Sapatnekar, University of Minnesota)

From the Back Cover

Design and optimization of integrated circuits are essential to the creation of new semiconductor chips, and physical optimizations are becoming more prominent as a result of semiconductor scaling. Modern chip design has become so complex that it is largely performed by specialized software, which is frequently updated to address advances in semiconductor technologies and increased problem complexities. A user of such software needs a high-level understanding of the underlying mathematical models and algorithms. On the other hand, a developer of such software must have a keen understanding of computer science aspects, including algorithmic performance bottlenecks and how various algorithms operate and interact. VLSI Physical Design: From Graph Partitioning to Timing Closure introduces and compares algorithms that are used during the physical design phase of integrated-circuit design, wherein a geometric chip layout is produced starting from an abstract circuit design. The emphasis is on essential and fundamental techniques, ranging from hypergraph partitioning and circuit placement to timing closure.

Most helpful customer reviews

2 of 2 people found the following review helpful.
A useful and well-written book for physical design
By Badger
This book gathers together two to three decades worth of VLSI physical design into a book spanning a mere 300 pages. However, this book's compactness comes not from a lack of information, but rather its concise and excellent presentation of material. What I most like about this book is that the book is a good launching point for learning unfamiliar subjects in physical design. One can literally pick up this book, flip to the subject of interest, and quickly understand most of the major aspects of that layer of physical design. It's *refreshing* and doesn't waste my time as other books have.

While the book is written to encompass an audience that is unfamiliar with VLSI physical design, it does not read as if dumbed-down or as a high-level survey. The book covers a range of topics from chip planning to detailed routing, moving from basic concepts to advanced topics that are important in modern physical design. The core techniques, notably the graph-based techniques, are described in detail and with examples, providing a foundation for the other sections of the book.

The presentation of material is straightforward and well-detailed, relying heavily on examples and illustration to reinforce concepts and help in understanding. The techniques described in each chapter are likewise described and illustrated at a high level, and always followed by a detailed example, guiding the reader through the steps both algorithmically and visually. In this manner, the iterative techniques "come alive" as the objectives of the technique are stepwise achieved. Interestingly, the end of the book contains *all* the solutions to the exercises found within the chapters--something I found useful as secondary examples to the techniques described.

For readers already familiar with some of the material, each chapter contains a large set of key references cited throughout the chapters. These references are handy, helping to sift through decades worth of techniques, refinements, and heuristics--as well as providing insight into how such techniques have evolved to address changes in semiconductor fabrication.

Overall, I am pleased with this book and have found it useful. Some of the points outlined above may seem to apply to decent textbooks in general, but really, this book is a pleasure to read-for-understanding as compared to other reference books.

2 of 2 people found the following review helpful.
Great textbook on physical design
By Artiga
I used this textbook to teach a graduate level CAD course. It is a comprehensive study of both the classical and recent works on physical design algorithms.

The book is well written, and is easy to understand for students with little background in the area. The slides provided are also very helpful.

0 of 0 people found the following review helpful.
Great textbook for VLSI CAD classes
By Peter_BSH
I have been searching for a good textbook for my VLSI CAD classes for years. With this book I finally found it. Well structured, good explanations, even a complete slide set (PPT and PDF) for all the chapters is available via the author’s book site… I can recommend to anyone teaching EDA to consider this as THE textbook.

See all 3 customer reviews...

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